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ADuM4160
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
V BUS1 1
GND 1 * 2
16 V BUS2
15 GND 2 *
V DD1 3
PDEN 4
ADuM4160
TOP VIEW
14 V DD2
13 SPD
SPU 5
UD– 6
UD+ 7
(Not to Scale) 12 PIN
11 DD–
10 DD+
GND 1 * 8
9
GND 2 *
NC = NO CONNECT
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING
BOTH TO GND 1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
CONNECTED, AND CONNECTING BOTH TO GND 2 IS RECOMMENDED.
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic Direction Description
1
V BUS1
Power
Input Power Supply for Side 1. Where the isolator is powered by the USB bus voltage, 4.5 V to 5.5 V,
connect V BUS1 to the USB power bus. Where the isolator is powered from a 3.3 V power supply, connect
V BUS1 to V DD1 and to the external 3.3 V power supply. Bypass to GND 1 is required.
2
3
GND 1
V DD1
Return
Power
Ground 1. Ground reference for Isolator Side 1.
Power Supply for Side 1. Where the isolator is powered by the USB bus voltage, 4.5 V to 5.5 V, the V DDI pin
should be used for a bypass capacitor to GND 1 . Signal lines that may require pull up, such as PDEN and
SPU, should be tied to this pin. Where the isolator is powered from a 3.3 V power supply, connect V BUS1 to
V DD1 and to the external 3.3 V power supply. Bypass to GND 1 is required.
4
PDEN
Input
Pull-Down Enable. This pin is read when exiting reset. For standard operation, connect this pin to V DD1 .
When connected to GND 1 while exiting from reset, the downstream pull-down resistors are
disconnected, allowing buffer impedance measurements.
5
SPU
Input
Speed Select Upstream Buffer. Active high logic input. Selects full speed slew rate, timing, and logic
conventions when SPU is high, and low speed slew rate, timing, and logic conventions when SPU is tied
low. This input must be set high via connection to V DD1 or set low via connection to GND 1 and must
match Pin 13.
6
7
8
9
10
11
12
UD?
UD+
GND 1
GND 2
DD+
DD?
PIN
I/O
I/O
Return
Return
I/O
I/O
Input
Upstream D?.
Upstream D+.
Ground 1. Ground reference for Isolator Side 1.
Ground 2. Ground reference for Isolator Side 2.
Downstream D+.
Downstream D?.
Upstream Pull-Up Enable. PIN controls the power connection to the pull-up for the upstream port. It can
be tied to V DD2 for operation on power-up, or tied to an external control signal for applications requiring
delayed enumeration.
13
SPD
Input
Speed Select Downstream Buffer. Active high logic input. Selects full speed slew rate, timing, and logic
conventions when SPD is high, and low speed slew rate, timing, and logic conventions when SPD is tied
low. This input must be set high via connection to V DD2 or low via connection to GND 2 , and must match
Pin 5.
14
V DD2
Power
Power Supply for Side 2. Where the isolator is powered by the USB bus voltage, 4.5 V to 5.5 V, the V DD2 pin
should be used for a bypass capacitor to GND 2 . Signal lines that may require pull-up, such as SPD, can be
tied to this pin. Where the isolator is powered from a 3.3 V power supply, connect V BUS2 to V DD2 and to the
external 3.3 V power supply. Bypass to GND 2 is required.
15
16
GND 2
V BUS2
Return
Power
Ground 2. Ground reference for Isolator Side 2.
Input Power Supply for Side 2. Where the isolator is powered by the USB bus voltage, 4.5 V to 5.5 V,
connect V BUS2 to the USB power bus. Where the isolator is powered from a 3.3 V power supply, connect
V BUS2 to V DD2 and to the external 3.3 V power supply. Bypass to GND 2 is required.
Rev. D | Page 8 of 16
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